The customer developed a new PLC generation based on Linux. The former PLC was based on WinCE and the hardware/software concept needed to be reused. The former device was a PLC with a modular I/O system (up to 64 slots), based on a backplane bus. This needed to be reused under Linux.
The architecture to access the PCI bus was prepared in order to reuse the WinCE code with just few modifications. To access the PCI, the uio_pci_generic driver was selected permitting the memory of the PCI device to be directly mapped in the user space and accessed by the component which implements of IO-control.
During development it was taken into account that the original implementation was done for the hardware based on 32 bits processor whereas the new hardware generation works in 64 bits.
The backplane bus was controlled using several real-time tasks which were implemented considering concurrent access to the hardware. As real-time implementation in Linux (Linux kernel 4.1 with RT PREEMPT) is different than in WinCE, it was required to reimplement the bus controller logic (FPGA). The concept was defined together with the customer and corresponding changes were also performed in the newly developed driver.
The drivers (CODESYS and OS drivers) were ported to Linux and deployed to the different types of CPU modules. Complex hardware dependent issues were investigated into during development. The software to perform module tests was developed and system tests were performed as well.
After a few man months of development and an intensive Quality Assurance process, we delivered the project on time.